The present invention relates, in general, to protecting semiconductor devices, and more particularly, to protecting semiconductor devices using clamp circuits.
Power semiconductor devices are used in high power applications in areas such as automotive electronics, machine automation, and the like. For example, a power semiconductor device such as a power metal oxide semiconductor field effect transistor (MOSFET) is frequently used to switch an inductive load. When the power MOSFET is switched off, the inductive energy stored in the inductive load can raise the drain voltage of the power MOSFET above the supply voltage. If no protection for the power MOSFET is provided, the drain voltage of the power MOSFET will continue to rise until it exceeds the drain-source avalanche voltage, leading to conduction in an internal parasitic bipolar transistor and causing an avalanche stress induced failure of the power MOSFET.
One method for protecting the power MOSFET against the avalanche stress induced failure is to divert a small portion of the inductive energy to the gate of the power MOSFET through a drain-gate clamp diode having an avalanche voltage slightly less than the avalanche voltage of the power MOSFET. A resistor is placed between the gate and source of the power MOSFET to dissipate any leakage current through the drain-gate clamp diode without activating the power MOSFET. A blocking diode is usually placed in series with the drain-gate clamp diode to block current from a gate signal source to the drain of the power MOSFET. When the drain-source voltage of the power MOSFET rises above the avalanche voltage of the drain-gate clamp diode, a current flows through the clamp diode, which activates the power MOSFET by developing a voltage across the resistor. The power MOSFET is turned on and dissipates all of the inductive energy. Thus, the power MOSFET dissipates the inductive energy in a less stressful conduction mode. Another method for protecting the power MOSFET is to place a clamp diode between the drain and source of the power MOSFET, wherein the avalanche voltage of the clamp diode is slightly less than that of the power MOSFET. The inductive energy is dissipated through the clamp diode instead of the power MOSFET when the drain-source voltage rises above the avalanche voltage of the drain-source clamp diode.
The avalanche voltage of the clamp diode determines the rate at which the inductive energy is dissipated. To achieve a high switching speed and protect the power MOSFET, it is desirable to set the clamp diode avalanche voltage (V.sub.clamp) as closely below the power MOSFET avalanche voltage (BV.sub.dss) as possible. Because BV.sub.dss is not measurable with the drain-gate clamp diode or the drain-source clamp diode intact, process control data are typically used to infer BV.sub.dss. However, this approach has been proven unreliable at guaranteeing V.sub.clamp &lt;BV.sub.dss because of the temperature, process, and geometric variations in the power MOSFET.
Other approaches include the separate wire bond approach and the split pad approach. The separate wire bond approach uses a clamp bond pad and a drain bond pad connected to the clamp diode and the drain of the power MOSFET, respectively. V.sub.clamp and BV.sub.dss are measured using the two separate pads to ensure V.sub.clamp &lt;BV.sub.dss. Afterwards, the two bond pads are wired to the same post to complete the circuit. The split pad approach combines the clamp bond pad and the drain bond pad into a split pad. V.sub.clamp is measured using the clamp section of the split pad and BV.sub.dss is measured using the drain section of the split pad. After V.sub.clamp &lt;BV.sub.dss is ensured, the two sections of the split pad are wire bonded to form a single pad to complete the circuit. For both of these approaches, additional processing steps are required to complete the circuit after the measurement of V.sub.clamp and BV.sub.dss, and the transistor is vulnerable to electrostatic discharge (ESD) because the clamp is not active before completing the circuit. Furthermore, the separate wire bond approach requires more area and increases the manufacturing complexity.
Accordingly, it would be advantageous to have a clamp circuit for which V.sub.clamp and BV.sub.dss can be measured with the clamp intact to ensure protection at all times. It would be of further advantage for the clamp circuit to be area efficient and easy to manufacture.